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The iAPX 432 (''Intel Advanced Performance Architecture''〔Sometimes ''intel Advanced Processor architecture''〕), introduced in 1981 as a set of three components, was Intel's first 32-bit processor design. The project started in 1975 as the 8800 (after the 8008 and the 8080) and was intended to be Intel's major design for the 1980s. The instruction set architecture was entirely new and a significant departure from Intel's previous 8008 and 8080 processors as the iAPX 432 programming model was a stack machine with no visible general-purpose registers. The iAPX 432 was referred to as ''a micromainframe designed to be programmed entirely in high-level languages''.〔Even though some early 8086, 80186 and 80286-based systems and manuals used the iAPX prefix for marketing reasons, the iAPX 432 and 8086 processor lines are completelely separate designs with completely different instruction sets.〕 It supported object-oriented programming, garbage collection and multitasking as well as more conventional memory management directly in hardware and microcode. Direct support for various data structures was also intended to allow modern operating systems to be implemented using far less program code than for ordinary processors. iMAX 432 was an operating system for the iAPX 432, written in Ada, and Ada was also the intended primary language for application programming. In some aspects, it may be seen as a high-level language computer architecture. These properties and features resulted in a hardware and microcode design that was more complex than most processors of the era, especially microprocessors. However, internal and external buses were (mostly) not wider than 16-bit, and 32-bit arithmetical instructions were implemented by a 16-bit ALU, via microcode or logic, just like in other 32-bit microprocessors of the era (such as the 68000 or 32016). The iAPX 432 enlarged address space over the 8080 was also limited by the fact that ''linear addressing'' of data could still only use 16-bit offsets, somewhat akin to Intel's first 8086-based designs, including the contemporary 80286 (the new 32-bit segment offsets of the 80386-architecture was described publicly in detail in 1984〔although the 80386-chip was not massproduced until mid 1986〕). Using the semiconductor technology of its day, Intel's engineers weren't able to translate the design into a very efficient first implementation. Along with the lack of optimization in a premature Ada compiler, this contributed to rather slow but expensive computer systems, performing typical benchmarks at roughly 1/4 the speed of the new 80286 chip at the same clock frequency (in early 1982).〔 This initial performance gap to the rather low-profile and low-priced 8086 line was probably the main reason why Intel's plan to replace the latter (later known as x86) with the iAPX 432 failed. Although engineers saw ways to improve a next generation design, the iAPX 432 ''Capability architecture'' had now started to be regarded more as an implementation overhead rather than as the simplifying support it was intended to be. Originally designed for clock frequencies of up to 10 MHz, actual devices sold were specified for maximum clock speeds of 4 MHz, 5 MHz, 7 MHz and 8 MHz〔(Intel iAPX-432 Micromainframe )〕 with a peak performance of 2 million instructions per second at 8 MHz. The iAPX 432 project was a commercial failure for Intel.〔 ==History== 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Intel iAPX 432」の詳細全文を読む スポンサード リンク
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